The Senior Staff FPGA Engineer is responsible for developing next generation SATCOM modem blocks based on TDMA/FDMA. The individual will be able to design, test, and integrate complex, high-speed FPGAs. This individual will work closely with hardware and software engineers during the test and integration phases. Additionally, they will be responsible for design, documentation, implementation and testing verification.
A qualified candidate will have Bachelor’s Degree (MS degree preferred) in Electrical Engineering, Computer Engineering, Physics or other technical field and at least 9 years related experience; or equivalent combination of education and experience. Solid understanding of digital signal processing and the ability to work with system and firmware engineers to specify and develop designs that meet system specifications, costs, and performance requirements. Must be able to read, understand and review schematic drawings. Experience with communication protocols such as RS-232, RS-422, UART, SPI, I2C, is required. Knowledge of digital device characteristics, design and simulation tools (e.g. ModelSim) based on Hardware Description Language (VHDL or Verilog) is required. Require at least 9 years of VHDL or Verilog code development. Require at least 5 years of hand-on signal processing or modem development. Experience with modem architecture, microprocessor architecture, and high speed interfaces (e.g PCIe, JESD) is a must. Experience with Altera or Xilinx Synthesis tool is required. Experience with Testbench Architectures, working knowledge of Matlab, C, and/or C++ is required. Experience with Altera Quartus software and SignalTap is required. Experience using lab instruments as oscilloscopes, signal generators, logic analyzers, and spectrum analyzers is required. Experience with modem or high-speed DSP data paths, digital filters, FFTs, and error-correction codes, Turbo or LDPC is required. Experience with external memory interfaces such as SDRAM or DDR3 is preferred. Familiarity with A/D and D/A interfacing and FPGA design experience is preferred. Understanding of wireless communication is preferred. Experience with modem RTL development including Discrete-time Signal Processing (DSP) and Digital Communications is highly desired. System Verilog/Verilog/VHDL Scripting and automation skills is strongly preferred.
Must be able to travel 10% of the time.
Applicants may be subject to a security investigation and must meet eligibility requirements for access to classified information. Active Secret level clearance is preferred.