Senior System Performance Engineer

San Francisco, CA, United States
Main Location
San Francisco, CA, United States
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We’re building the world’s best autonomous vehicles to safely connect people to the places, things, and experiences they care about.

Our vehicles are on the road in California, Arizona, and Michigan navigating some of the most challenging and unpredictable driving environments. We’re hiring people who want to solve some of today’s most complex engineering challenges and make a positive impact.

As a system performance engineer, you’ll be dedicated to end-to-end (kernel through userspace) performance instrumentation and optimization across our compute system, including primary Linux-based compute, GPU workloads, high speed peripherals (cameras, radar, lidar), and networking.

You’ll establish a deep architectural understanding of the Cruise autonomous vehicle system and ensure & demonstrate that the system meets strict performance requirements.

Responsibilities:

Create & deploy tools to collect performance data and identify bottlenecks and irregularities across our fleet of vehicles.

Diagnose and root cause performance issues, resulting either in fixes applied directly to affected components (ie kernel or driver patches), or recommendations to responsible engineering teams.

Collaborate with:

  • a broad cross section of Cruise engineers - to provide tools and best practices to prevent and detect performance issues in code under development.
  • QA and data science teams to report on and identify important performance metrics over time

Assist in the evaluation of new products & technologies for inclusion in future system revisions.

Requirements:

Five years or equivalent experience working in production with the following:

  • Linux-based performance instrumentation and tooling
  • Kernel internals
    • Scheduling
    • Networking
    • High speed peripheral interfacing via PCIe
    • High throughput data logging and disk access
    • NUMA memory access patterns
  • Complex systems
    • Hardware architecture spanning multiple high speed peripherals and redundant fail-safe mechanisms, with tight execution budgets
    • Applications with large numbers of processes, often competing for shared resources, under active development

Bonus Skills:

  • RTOS Experience
  • Kernel Driver Development Experience
  • Understanding of GPU memory access patterns, data movement
  • Understanding of x86-64 and/or ARM v8 compute architecture
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