These positions are for Software Digital Signal Processing Engineers within the Raytheon Integrated Defense Systems, Electrical Design Directorate, Receiver Exciter and Signal Processing Department. The Receiver, Exciter and Signal Processing Department designs, developer, and integrates a number of different products and technologies relative to radar systems. The Signal Process Technology group within the Receiver, Exciter, and Signal Processing Department focus on state-of-the-art processing technologies and distributed high performance computing architectures that are used to build next-generation Radar Signal Processing applications.
Responsibilities include working within Linux, Unix and Real Time Operating System developing C/C++ implementation of signal processing algorithms and time critical control functions involved in and direct control of sensor systems. This position will also include working closely with Software Architects and Principal Systems, Hardware, and Software engineers to interpret requirements and correctly implement these requirements in software.
U.S. Citizenship status is required as this position will need a U.S. Security Clearance within 1 year of start date.
This position can be a G08 or a G09 based on the candidate’s qualifications as they relate to the skills, experience and responsibilities required for the position.
4+ years or relevant experience
C++/C on Linux or Unix environments
Familiarity Multithreaded application development experience that includes testing and debugging
Ability to translate system performance and operation specifications into software requirements, design, and test specifications
U.S. Citizenship is required
Working understanding of parallelism and concurrency as applied to algorithm implementation on shared memory and distributed systems
Direct experience implementing complex signal processing algorithms in C++ meeting latency and throughput performance requirements or experience in implementing complex control operations in software with defined performance timelines
Experience in developing and optimizing algorithms for performance.
Experience in multithreaded, multiprocessor software development using pthreads, OpenMP, or MPI programming models on clustered deployments
Experience developing applications for GPGPU and/or Intel Xeon Phi processors
Familiar with software configuration management and development process control (i.e. CMMI)
Experience in using version control tools such as ClearCase
Continuous integration and test experience in a hardware/software laboratory environment
Strong communication skills
Ability to work independently and in a team
High degree of creativity and ability to solve a wide range of difficult problems
Ability to obtain a Secret security clearance
Required Education (including Major):
Bachelor's degree in an engineering or scientific discipline. Advance degree desirable.