Senior Hardware Design Engineer

Salt Lake City, UT, United States Senior


Employees at L3 Communication Systems-West create solutions that save lives. Join our team and serve those who serve us.

Who is L3 Communication Systems-West (L3 CSW)? With over 3400 employees, we are one of Utah’s top employers. Our smart devices send mission-critical data into armed conflicts to help our troops stay safe by staying in touch with key information. We’ve taken large communications systems—ground based, mobile, satellite, surveillance and reconnaissance—and developed new ways to make them smaller and more capable.

Why should you work at L3 CSW? Not only can you make life-saving differences for our troops, but at L3 CSW, you can have a flexible work schedule, buy up to 80 hours of additional vacation, access our on-site health clinic, work out in our on-site fitness center, eat in our on-site cafes with healthy food discounts, ride our shuttles or bicycles around our campus, take advantage of our tuition reimbursement, access L3 Perks, and so much more!

Who works at L3 CSW? We are committed to diversity in every aspect of our business. Our inclusive culture welcomes all employees and values their unique contributions to our success. For L3 CSW, diversity enhances our business.

Are you ready to be L3 CSW? Join us as we keep our nation and troops safe by providing life-saving solutions for use on sea, land, air, and space.

Hardware Design Engineer

As a Hardware Design Engineer you will be tasked with developing the next generation networking technologies for mobile ad-hoc wireless communications systems. Specifically we are seeking engineers with FPGA and/or Digital CCA design experience.

Responsibilities include:

  • Architect, design, and test networking hardware equipment for mobile ruggedized applications
  • Create and run self-checking simulation test benches for FPGA designs
  • Coordination across functional design teams including mechanical, signal integrity, PCB layout, and manufacturing teams
  • Support proposal efforts and plan project development within an Earned Value (EV) system
  • Conduct analytical architecture trade studies and risk management activities related to the development of communications systems
  • Plan and lead hardware design reviews



Baseline Qualifications Include:

  • An ABET (EAC/CAC) accredited Master’s of Science Degree in CS, CE or EE is strongly preferred, a Bachelor’s with 2-8 years related experience, or an equivalent technical education with 8-15 years related experience will be considered.
  • High speed digital CCA design experience incorporating FPGAs, current high performance processors (i.e. ARM, x86, ATOM), and networking ASICs
  • Experience with schematic capture tools (Mentor Graphics xDx Designer preferred)
  • Experience with high speed serial interfaces (10+ Gbps)
  • Experience with high speed signal layout, PCB stack-up, and termination techniques
  • Experience with industry standard interfaces including 10/100/1000 Ethernet, DDR3, DDR4, PCI Express
  • Expertise in FPGA simulation, synthesis, and placement software tools such as ModelSim/QuestaSim, Synplify, Xilinx ISE and/or Altera Quartus development tool sets
  • Expertise in either VHDL (preferred) or Verilog development languages.
  • Expertise in laboratory debug techniques using digital scopes, logic analyzers, BERTS, and other complex measurement devices.
  • Applicants must be self-motivated and willing to work within company defined development processes
  • Excellent written, verbal, and presentation skills
  • Familiarity with code revision management tools such as Git/Clearcase is a plus.
  • Familiarity with C/C++ is a plus
  • Must be able to obtain DoD security clearance

Experience in lieu of a degree will be considered.

This position may be filled at a higher grade based on the successful applicant's skills, education and experience.

Due to the nature of our work qualified candidates must be able to obtain and maintain a DoD security clearance.


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