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- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- 3 years of experience with verification methodologies and languages such as UVM and SystemVerilog.
- Experience developing and maintaining verification testbenches, test cases, and test environments.
Preferred qualifications:
- Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science.
- Knowledge of different verification techniques and methodologies (e.g., GLS, UVM, C based testing, etc.) to achieve bug-free Silicon in SoCs.
Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
- Plan the verification of Memory Subsystem IPs at IP and Subsystem level by understanding the design specification and interacting with architecture and design engineers to identify important verification scenarios.
- Create and enhance constrained-random verification environments using System Verilog and UVM, or formally verify designs with SVA and industry leading formal tools.
- Identify and write all types of coverage measures for stimulus and corner-cases.
- Participate with architecture, design teams, and software teams in defining the overall verification strategy.
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