Lead CPU and Performance Architect
Onsite
United StatesMountain View, CA, United StatesAustin, TX, United StatesPoughkeepsie, NY, United States
United States
Full Time Posted 20 days ago
Job Type
Full Time
Job Details
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Mountain View, CA, USA; Austin, TX, USA; Poughkeepsie, NY, USA. Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent practical experience.
- 11 years of high-performance microprocessor architecture, microarchitecture, performance, and design experience.
- Experience with high-performance CPU architecture and one of the following: ISA, ML, branch prediction, etc.
- Experience in performance modeling, analysis, correlation, and workload characterization.
- Experience with C/C++ and scripting languages.
- PhD in Electrical Engineering, Computer Engineering, or Computer Science, emphasizing on computer architecture or machine learning.
- 15 years of high-performance microprocessor architecture, microarchitecture, performance, and design experience.
- Experience in leading CPU/ML performance model development, performance analysis, performance correlation, and workload characterization.
- Knowledge of system software components such as Linux, drivers, and runtime.
- Deep knowledge with processor instruction set architecture (e.g., ARM, RISC-V, x86).
- Plan and evaluate ARM’s architecture features from both architecture and performance angles.
- Develop performance model for performance analysis and micro-architecture study.
- Define and write CPU subsystem architecture specifications.
- Collaborate with other teams, such as RTL design, design verification, and physical design to develop a high performance and efficient CPU implementation.
- Drive performance correlation between the performance model and RTL implementation, including micro-benchmark development and pre-silicon and post-silicon performance bug triage
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