Job Type
Full Time
Job Details
Position:
FPGA Engineer (eInfochips Inc)
Job Description:
What you will be doing
• Requirements capture, ASIC / FPGA digital architecture and design using RTL, timing closure, verification, and system integration
• Recommend new tools and practices for continuous improvement in the group's ASIC / FPGA design flow
• Contribute to engineering estimates for new program pursuits.
• May provide technical leadership for project design teams by breaking down work, planning activities, and reporting status
Must have Skills:
• RTL coding and simulation in VHDL/Veriog
• Digital circuit architecture, design, resource tradeoffs, timing analysis and timing closure
• Proficiency using ASIC and/or FPGA simulation and synthesis tools (e.g. Modelsim, Synplify, Quartus, Vivado, or other FPGA-specific tools)
• Git, Subversion
• Experience with Unix, scripting, C/C++, and/or Perl
Preferred Skills:
• Familiarity with best practice chip-level verification techniques and languages (e.g. constrained random, functional coverage, SystemVerilog)
• ASIC / FPGA lab validation with advanced lab equipment
• Design for Test (DFT) and manufacturability issues
• Experience with Unix, scripting, C/C++, and/or Perl
Any special or skills related notes:
Ability to work with minimal supervision, team with engineers of a variety of skills and backgrounds, and matrix into projects with aggressive schedules and frequent milestones
Strong oral and written communication skills with the ability to document and present one's work and status
Education:
What's In It for You:
At Arrow, we recognize that financial rewards and great benefits are important aspects of an ideal job. That's why we offer competitive financial compensation, including various compensation plans and a solid benefits package.
Work Arrangement Fully On-Site: Must be able to travel to an Arrow Client office location as requested by Arrow
Client leadership.
Location: Cedar Rapids, IA (Day-1 Onsite)
Annual Hiring Range/Hourly Rate:
$ 145,000.00 - $160,000.00
Actual compensation offer to candidate may vary from posted hiring range based upon geographic location, work experience, education, and/or skill level. The pay ratio between base pay and target incentive (if applicable) will be finalized at offer.
About eInfochips
eInfochips, an Arrow company (Fortune #109), is a leading global provider of product engineering and semiconductor design services. A rich history of over two decades, with over 500+ products developed and 40M deployments in 140 countries, eInfochips continues to fuel technological innovations in multiple verticals. eInfochips has strategic technology partnerships with Qualcomm, NVIDIA, NXP, Analog Devices, Texas Instruments, Amazon, Microsoft and Google to name a few. Along with Arrow's $33B in revenues, 22,000 employees, and 345 locations serving over 80 countries, eInfochips is primed to accelerate connected products innovation for 150,000+ global clients. eInfochips acts as a catalyst to Arrow's Sensor-to-Sunset initiative and offers complete edge-to-cloud capabilities for its clients. Please visit www.einfochips.com for our portfolio of product engineering services across various industries C verticals.
EEO Statement:
Arrow is an equal opportunity employer. All applicants will be considered for employment without attention to race, color, religion, gender, age, sexual orientation, gender identity, national origin, veteran or disability status.
Location:
US-IA-Cedar Rapids, Iowa (Collins Aerospace-IPS)
Time Type:
Full time
Job Category:
Engineering Services
EEO Statement:
Arrow is an equal opportunity employer. All applicants will be considered for employment without attention to race, color, religion, gender, age, sexual orientation, gender identity, national origin, veteran or disability status. (Arrow EEO/AAP policy)
We anticipate this requisition will be open for a minimum of five days, though it may be open for a longer period of time. We encourage your prompt application.
FPGA Engineer (eInfochips Inc)
Job Description:
What you will be doing
• Requirements capture, ASIC / FPGA digital architecture and design using RTL, timing closure, verification, and system integration
• Recommend new tools and practices for continuous improvement in the group's ASIC / FPGA design flow
• Contribute to engineering estimates for new program pursuits.
• May provide technical leadership for project design teams by breaking down work, planning activities, and reporting status
Must have Skills:
• RTL coding and simulation in VHDL/Veriog
• Digital circuit architecture, design, resource tradeoffs, timing analysis and timing closure
• Proficiency using ASIC and/or FPGA simulation and synthesis tools (e.g. Modelsim, Synplify, Quartus, Vivado, or other FPGA-specific tools)
• Git, Subversion
• Experience with Unix, scripting, C/C++, and/or Perl
Preferred Skills:
• Familiarity with best practice chip-level verification techniques and languages (e.g. constrained random, functional coverage, SystemVerilog)
• ASIC / FPGA lab validation with advanced lab equipment
• Design for Test (DFT) and manufacturability issues
• Experience with Unix, scripting, C/C++, and/or Perl
Any special or skills related notes:
Ability to work with minimal supervision, team with engineers of a variety of skills and backgrounds, and matrix into projects with aggressive schedules and frequent milestones
Strong oral and written communication skills with the ability to document and present one's work and status
Education:
- Bachelor's / Masters
What's In It for You:
At Arrow, we recognize that financial rewards and great benefits are important aspects of an ideal job. That's why we offer competitive financial compensation, including various compensation plans and a solid benefits package.
- Medical, Dental, Vision Insurance
- 401k, With Matching Contributions
- Short-Term/Long-Term Disability Insurance
- Health Savings Account (HSA)/Health Reimbursement Account (HRA) Options
- Paid Time Off (including sick, holiday, vacation, etc.)
- Tuition Reimbursement
- Growth Opportunities
- And more!
Work Arrangement Fully On-Site: Must be able to travel to an Arrow Client office location as requested by Arrow
Client leadership.
Location: Cedar Rapids, IA (Day-1 Onsite)
Annual Hiring Range/Hourly Rate:
$ 145,000.00 - $160,000.00
Actual compensation offer to candidate may vary from posted hiring range based upon geographic location, work experience, education, and/or skill level. The pay ratio between base pay and target incentive (if applicable) will be finalized at offer.
About eInfochips
eInfochips, an Arrow company (Fortune #109), is a leading global provider of product engineering and semiconductor design services. A rich history of over two decades, with over 500+ products developed and 40M deployments in 140 countries, eInfochips continues to fuel technological innovations in multiple verticals. eInfochips has strategic technology partnerships with Qualcomm, NVIDIA, NXP, Analog Devices, Texas Instruments, Amazon, Microsoft and Google to name a few. Along with Arrow's $33B in revenues, 22,000 employees, and 345 locations serving over 80 countries, eInfochips is primed to accelerate connected products innovation for 150,000+ global clients. eInfochips acts as a catalyst to Arrow's Sensor-to-Sunset initiative and offers complete edge-to-cloud capabilities for its clients. Please visit www.einfochips.com for our portfolio of product engineering services across various industries C verticals.
EEO Statement:
Arrow is an equal opportunity employer. All applicants will be considered for employment without attention to race, color, religion, gender, age, sexual orientation, gender identity, national origin, veteran or disability status.
Location:
US-IA-Cedar Rapids, Iowa (Collins Aerospace-IPS)
Time Type:
Full time
Job Category:
Engineering Services
EEO Statement:
Arrow is an equal opportunity employer. All applicants will be considered for employment without attention to race, color, religion, gender, age, sexual orientation, gender identity, national origin, veteran or disability status. (Arrow EEO/AAP policy)
We anticipate this requisition will be open for a minimum of five days, though it may be open for a longer period of time. We encourage your prompt application.
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