In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.

Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.

The US base salary range for this full-time position is $150,000-$223,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target for new hire salaries for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.

• Lead the team responsible for ATE test program development and characterization for NPI and pass to High Volume Manufacturing, developing budgets, allocating work, and partnering with vendors and internal cross-functional teams.
• Drive test development projects, including DFT structural tests, IP-level test, functional tests, memory and logic repair, and eFuse programming.
• Develop and execute strategies for SoC Product NPI, bring-up, verification, characterization, and qualification support, including bench test, troubleshooting, test coverage optimization, new product DPPM correlation, and product correlation between system and ATE.
• Be able to back-stop support for production, including test program upgrade and release, volume data analytics, test time reduction and yield improvement, and RMA analysis.