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Job Type
Full Time
Job Details
Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Physics, or equivalent practical experience
- 5 years of experience in power integrity and signal integrity field
- Experience in signal and PDN modeling, simulation, and optimization for core power
- Experience with lab voltage/current and high speed signal measurements
- Knowledge of on-chip power analysis flow and SoC physical design
- Participate in package, board, and PMIC design feasibility study, technology selection, design optimization (stackup, ballmap, decaps, and layout).
- Model extraction and simulation setup, frequency domain, and time domain simulations for core power, LPDDR, High Speed IO interfaces (MIPI, UFS, PCIE, USB2, USB3, DP, etc.).
- Perform SI/PI methodology development and flow automation.
- Provide power and peripheral IOs system level design guidelines and support.
- Perform lab measurement, correlation study, and root cause debugging.
About the Company
Google Inc.
Mountain View, CA, United States
Build for everyone Since our founding in 1998, Google has grown by leaps and bounds. Starting from two computer science students in a university... Read more